Three-dimensional (3-D) integrated circuit technology where circuit structures formed on several silicon-on-insulator (SOI) substrates are bonded together and integrated into a 3-D circuit with dense-vertical connections becomes of increasing importance in modern semiconductor technology (see, for example, paper by Burns et al., entitled “A Wafer-Scale 3-D Circuit Integration Technology,” IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 10, OCTOBER 2006, pages 2507-2516). The building blocks of the 3-D circuit integration technology are fully depleted SOI (FDSOI) circuit fabrication, precision wafer-wafer alignment, low-temperature wafer-wafer oxide bonding (molecular bonding, oxide fusion bonding), and electrical connection of the circuit structures with dense vertical interconnections. When compared to conventional bump bond technology, the wafer-scale 3-D technology offers higher density vertical interconnections and reduced system power.
Molecular bonding of wafers requires that the surfaces of the same are sufficiently smooth, free of particles or contamination, and that they are sufficiently close to each other to allow contact to be initiated, typically at a distance of less than a few nanometers at a point of initiation. The contact will be initiated at a local point where the two wafer surfaces have the closest approach to each other: no pressing forces need to be applied to the wafers. In this case, the forces of attraction between the two surfaces are sufficiently high to cause propagation from this location of a “bonding wave” and molecular adhesion (bonding induced by all of the forces of attraction—Van Der Waals forces—of the electronic interaction between the atoms or the molecules of the two surfaces of the wafers that are to be bonded). By the term “bonding wave” it is referred to the front of the bond or the molecular adhesion spreading from the point of initiation and corresponding to the dissemination of the forces of attraction (Van Der Waals forces) from the point of initiation over the entire surface of close contact between the two wafers (bonding interface).
However, molecular bonding faces the severe problems of bonding interface defects, wafer misalignment and wafer overlay defects due to heterogeneous distortions which appear in the transfer layer during its assembly with the receiving substrate. Such distortions are not the result of elementary transformations (translation, rotation or combinations thereof) that could originate in inaccurate assembly of the substrates (misalignment).
These distortions result from non-homogeneous deformations that appear in the layer while it is being assembled with the final substrate. In fact, such distortions can lead to variations in position which may be in the order of several hundred nanometers or even microns. Since these distortions are not homogenous, it is not possible to correct completely these misalignment errors during subsequently performed photolithography steps. Thereby non or dysfunctional semiconductor devices may result.
In view of the above and in spite of the recent technological progress there is a need for an apparatus for the manufacture of semiconductor devices that provide molecular bonding of wafers for 3D integrated circuit technology with sufficient accuracy, in particular, alignment and suppression of bonding interface defects, as well as a high through-put.